Zuken’s Constraint Browser is an application that guides engineers through a fully integrated, constraints-driven design methodology to meet high-speed performance requirements. For high-speed designs, topology templates can be created based on reference designs that include guidelines for track lengths, widths and spacing – greatly reducing the effort to configure and manage constraints, a case example is DDR3.
Topology template set up with DDR3 constraints can be assigned to nets in the DDR3 RAM, routing topology and constraints in topology template will be automatically assigned to DDR3 RAM nets. Designers could base on these constraints for component placement and also route trace with constraint lengthening control.
– Daisy chain routing topology set up in topology template and being assigned to nets of DDR3 RAM.
– Constraints in topology template is assigned to pin pairs of electrical nets of DDR3 RAM and placement of components can be based on the constraints.
– Lengthen of DDR3 RAM nets will base on the constraints of the topology template that assign to the DDR3 RAM nets.
– Actual routed length of the nets of DDR3 RAM can be updated in Constraint Browser and compare against the topology template constraints.
Once the topology template with constraints are created, it can be reused for other designs, hence also reduces design costs and time-to-market by eliminating unnecessary prototypes and re-engineering cycles.